Standardi

IEEE 61691-4-2004

Kumottu

Lisää mahdolliset korjaukset ja lisäykset ostoskoriin alta.

Kieli
Toimitustavat

Soveltamisala

- Inactive-Withdrawn. The Verilog(R) Hardware Description Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language.

Julkaisun tiedot

  • Standardi julkaisijalta IEEE/IEC
  • Julkaistu:
  • Julkaisutyyppi: IS
  • products.specs.pages
  • Publisher IEEE/IEC
  • Distributor IEEE/IEC
  • ICS 25.040
  • ICS 35.060
  • Tekninen komitea IEEE Computer Society / Design Automation

Sidokset